(1) Field of the Invention
The present invention relates to a method of forming a resist micropattern in the manufacture of semiconductor devices.
(2) Description of the Prior Art
The packing density of seminconductor ICs has been greatly improved along with development of micropatterning. A micropattern on the order of one micron is utilized in VLSIs represented by 256-Kb DRAMs. A submicron patterning technique is required for megabit VLSIs. Conventional lithographic techniques present the following problems when used to form such a micropattern.
Surface roughness of a substrate presents a first problem. According to the conventional lithographic technique, a single resist film is formed on the substrate. Proper exposure and development are performed in accordance with the conditions (e.g., a film thickness) of the resist film, thereby obtaining a predetermined pattern. However, on an LSI substrate having many microprojections and microrecesses, a film thickness varies from place to place, or the film surface becomes uneven. Therefore, optimal exposure and development conditions vary from place to place, and uniform micropatterning throughout the entire surface of a substrate cannot be obtained. In order to overcome this, a thickness of the resist film is set to be considerably larger than heights of steps, thereby decreasing the degree of difference in film thickness over a substrate surface. However, when the resist film has a large thickness, resolution of the pattern is degraded due to defocusing during exposure and swelling during development, and micropatterning cannot be properly performed. Therefore, an increase in thickness of the resist film will exert bad effect on the formation of submicron micropattern.
Second, dry etching resistance of the resist pattern is also an important factor in forming submicron micropatterns. In a process of forming a micropattern in a substrate or various films for constructing electronic devices formed on a substrate, using a resist micropattern as a mask to etch the substrate or films for constructing electronic devices, the conventional wet etching methods using chemicals cannot be practical, since an undercut occurs by the etching. Therefore, a dry etching method using a gas plasma is now exclusively used for the formation of such a micropattern. Although the dry etching method has good reproducibility of the pattern size, a resist material containing an organic polymer as a major constituent tends to be easily etched. In order to maximize reproducibility, the resist film thickness must be sufficiently large, and a film must be exposed and developed to obtain a substantially vertically etched side surface. However, an increase in thickness of resist film would conflict with the improvement of micropatterning as described above.
Third, another conventional drawback is associated with exposure techniques. For example, in photoexposure using ultraviolet rays, submicron patterning is regarded as impossible in practice due to a diffraction limit based on wavelength of ultraviolet rays. Electron beam exposure and X-ray exposure have recently received a great deal of attention. Various resist materials are available for electron beam exposure and X-ray exposure. However, there are few resist materials which satisfy high resolution and high sensitivity requirements. A typical example is a positive type copolymer of fluorobutylmethacrylate and glycidylmethacrylate (FBM-G). Such a resist material is thermally unstable and has poor dry etching resistance described above as the second problem and cannot be used in practice.
The conventional problems indicate that it is very difficult to obtain an optimal photoresist film thickness which is suited for the exposure and etching processes when the micropattern becomes higher in fineness and density.
In order to solve the above conventional problems, a multilayer resist technique is known (e.g., see U.S. Pat. No. 4,244,799). A thick layer underlayer resist is coated on a substrate to absorb the uneveness of the surface of the substrate, an intermediate layer made of a material (e.g., SiO.sub.2) having good etching selectivity with respect to the underlayer resist is formed on the underlayer resist, and a toplayer resist having good resolution is formed on the intermediate layer. A desired circuit pattern is formed on the toplayer resist to form a toplayer pattern. By using the toplayer pattern as a mask, the intermediate layer is etched by reactive ion etching (RIE). By using the intermediate layer pattern as a mask, the underlayer resist is then etched by RIE.
According to this conventional technique, however, the number of steps is increased, and the entire process is complicated, thus limiting automation of a processing apparatus. In addition to these disadvantages, when a low heat resistant, material is used as a toplayer resist, dry etching conditions of the intermediate layer become critical. Furthermore, when a lower portion of the toplayer resist remains unremoved after a development process due to changes in lithographic conditions, etching of the intermediate layer is adversely affected, thereby requiring critical control of the entire etching process.
It is therefore desired to develop a novel method of forming a resist pattern, which can be carried out without worrying about the low resistance of a high sensitive resist material.